Peripheral controllers of the main line were to be developed on a common design of the Bull URC, while E120 peripherals had to be "integrated" and controlled by the CPU firmware..
The overall architecture of the PSI --Peripheral Subsystem Interface, Channel was drafted at that time.
Because the 8-bit byte orientation of the L-178, it had to be a parallel 8-bit channel. For data integrity reasons, due to the relatively low reliability of the subsystems of that time, it was excluded that PCPs had a direct access (DMA) to the main memory and decided that those accesses had to be controlled by the CPU itself.
A separate IOC (input-output controller), regrouping the channels' access to the system memory, was not envisioned at that time for cost reasons. It was also considered that the PSI should be the "long" cables in the system because the interface between the PCP and the devices might have to be specific and ought to control a "real-time" interface. This general design was later adopted for both the new product line and the GE-600+ line. In the latter, PSI channels -- although never actually identical to the NPL ones, supersede progressively the old (1965) CPI 6-bits wide channels.
It may be interesting to note that the main Discs that were contemplated at that time were removable discs with a 17MBytes(!) capacity and a transfer rate of 468KB/s. Future (1975) discs with up to 300MBytes were envisioned.
Those systems remained punched card oriented, they were assuming a development of optically- reading of documents that was never materialized, while impact printers had, at that time, already reached their maturity (1300lpm).
The expected reliability was poor in face of present standards, no more than a MTBF of 100 hours. That was due to the low level of integration of the technology and consequently to the amount of connectors and cards existing in the system.