Origin of the Level 64
the New Product Line of  Honeywell in the 1970s'


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The following memo tells the story of the origin of Level 64, the predecessor of DPS7.

Cancellation of Bull 140 project (end of 1966)

The origin of the Bull "New machine" may be traced down to the cancellation of the BULL G140.

The G140 project was the first system designed at Bull General Electric after the GE merger in 1964. The 140, later announced as GE140, was a medium range system 16-bits wide designed for tape and disc environments ; the disc version was never physically delivered to customers. The design of its software was later "exported" to the CII for the design of CII IRIS 50. The chief architect of the 140 software was François SALLE.
Initially, the 140 had been designed as a member of a common product line with GEISI –General Electric Information Systems Italia– GE115 that eventually was sold very successfully by Bull General Electric

The G140 program was, in fact competing with another GE system, a 24-bit second-generation computer named GE400 developed in Phoenix AZ. As that of the GE-400, the G140 technology remained quite conventional with discrete transistors components, although Bull hardware labs had designed modular elements called "mini-modules" that could have been eventually integrated in ICs.

The G140 program was canceled by the end of 1966 after a marketing announcement inside Bull territories. Among the reasons of the cancellation were the internal competition with GE400, the relatively high development cost combined with  Bull General Electric's lack of money. It should be remembered that in this period, computers were leased from the manufacturers and manufacturing new computers was, for any company, a capital drain that required many years to recover. 
The cancellation caused a big turmoil in French Marketing and of course in Engineering. Bull-GE  was very quickly deserted by many of its engineers who joined the Government subsidized CII.
The end of the 140 project was that the Czechoslovakian company Tesla acquired the license of G140 and the manufacturing rights for that system.



Launch of project "Charlie"


As a conservative measure to keep some engineers on board, BULL-General Electric, with GE agreement, assigned to Pierre DAVOUS, assisted by Georges LEPICARD, an exploratory mission to specify a line of medium sized machines that could be sold competitively with IBM 360 –the IBM product line then emerging as a definitive success–.
That line of products would have to be micro-programmed, a technique that the Bull team was the only one having experimented inside GE with the projects  M40 and GE140.
This project received the name of "Project CHARLIE". A few Americans from Phoenix engineering, noticeably Izzy EPSTEIN, joined a research team of around 20 French people.

Some of the basic design options of the DPS7 have been taken during this study. Particularly, it was decided to have an architecture now known as CISC using 32 bits registers à la S/360 and to introduce some MULTICS segmentation features. It was also considered that real-time transactional applications should merit a firmware implementation of the process (presently named threads) dispatching mechanism. A first draft of the instruction code set was established. Several models were contemplated differing by the width of their data path (16 and 32 bits).


During this period, GE hired an ex-IBMer, John HAANSTRA, as vice-president for Strategy. He took a direct interest in the design options of the CHARLIE project.

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John Haanstra

John HAANSTRA recommended that the peripheral controllers (PCP Peripheral Control Processors) be micro-programmed, avoiding special logic as much as possible, and the Bull URC -- that was later followed by its cousins like the Phoenix MPC and the NEC URP, was initiated by Henri VERDIER team on the base of J.HAANSTRA recommendations.
In parallel, technology studies were initiated: while the choice of integrated circuits was obvious (RCA had already shipped its Spectra70 line), several solutions were possible for the transistors types. GE had started in Schenectady the study of CML – a variant of ECL, slightly less power-hungry– and CML was a potential candidate for the new line of systems in parallel with TTL.

General Electric L178 Product Line


A GE Management review took place at the end of 1967 and it was decided that the Bull Charlie study should be the base of a modern GE product line essentially targeted to replace GE-100 and GE-400 product lines.

This product line should have been designed jointly by GEISI, Bull and the GE400 team of Phoenix. The GE600 team of Phoenix was then busy to fix design and implementation problems in both the GECOS3 and the MULTICS systems and was let apart of the new design. ASTO research center in Phoenix, directed by John WEIL and Mauro PACELLI, was to be deeply involved in the project.

It was decided to review the options of the Bull study (project Charlie) and to launch a project called L178 product line composed of three models:

  • E120 as a 16-bit low-end machine assigned to GEISI,
  • R370 to be developed by Bull General Electric
  • W108 a more powerful system to be developed by GE Phoenix.

A strict security system, à la IBM, was instituted for the new design. Code names were formed from the initials of the project manager and documents were classified as GE class4 for all business planning and financially sensitive matters and class3 for technical matters. Class4 documents received a number for each page and they were distributed according a centralized and nominative list of distribution. Class3 documents were distributed according "need to know" lists of distribution. It seems that no leak to the press or to the outside occurred during that phase of the design .

The project  started effectively  in January 1968 under the effective direction of Eugen R. WHITE as a project manager reporting directly to John.HAANSTRA.

A coordination team was assembled in Phoenix ;
the chief architect was Georges LEPICARD from Bull-GE,
the software project leader was Leroy ELLISON from GE
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Some Bull hardware architects from BULL --G.BARONNAT and G.de PONCINS, joined the Phoenix team for around a year.

Specific program managers were assigned in the different organizations to coordinate local work and to report to the overall program manager. Jean-Pierre HARDY was program manager for the R370 to be developed by Paris.

The architecture was coordinated by George LEPICARD and discussed between the CPU architects, the compiler designers of ASTO and the Paris software people for the kernel (then called nucleus) requirements. The first draft of the "Interior decor" –this term was coined at this time by ASTO software people– was published by September 1968.


E120 Compatibility. Origin of Level 62 divergence

The E120 architecture was accepted as being a "subset" of the main line "interior decor". Consequently, a large autonomy was given to the designers of what became eventually  the Level 62 about the design of their architecture and their software. The divergence between DPS4 and DPS7 took place in 1968! However, at that time, it was implied that the upper range of the line should be able to operate in the lower level "mode"; this specification was later dropped.

It was initially envisioned that the E120 decor had to be the same as the one of the PCP, so that a single engine could be used on the subsystems and on the lower end of the line. This last approach was abandoned by November 1968, at Paris request to use a minicomputer 16-bit decor instead of a variable length "main frame" decor for the PCP.

The E120 project subsisted through the GE-Honeywell merger and gave birth to the Series 60 Level 62 product line.



A proprietary high level Implementation language for software development was planned :   Q-language, an ALGOL60 derived language, was designed, but actually never implemented.

The assignments of Software tasks to the development teams of Bull and Medium System Department in Phoenix were made: Bull abandoned for some years any work on COBOL, while some competence in basic operating system was attributed to what was then a very inexperienced Bull team.


An ACT team, under the responsibility of MIKE BAILEY reviewed the results of the preliminary software studies. That report was essentially confirming the initial design decisions about the use of segmentation, condemning demand paging in the sake of performances, recommending however paging as a tool for memory chunks allocation. It was insisting on the use of a powerful Macro- generator, both as a software methodology tool and as a job control language extension. It also let Management unwary about the "subsettability" of the interior decor, assuming that segmentation mechanism could be specific to a hardware model, without impacting the software unicity. It might have been that ACT was hunting from contracts in several GE divisions!


Architecture approaches

That period was marked by a cross-culture exchange in the software area between the GE600 world, the S/360 influence on Bull designers and the Burroughs culture that predominated in ASTO.The name of ASTO's Jack MERNER, one of the key architects of the Burroughs B5000, and that of Mauro PACELLI, head of sofware ASTO unit should be mentioned.

The Bull initial interior decor was then complemented by the implementation of a stack mechanism handled by firmware for parameters passing, while the arithmetics remain in S/360-like registers.

The general conventions of a static linkage mechanism were established. The introduction of the "process" concept in the interior decor was confirmed, although many designers from GECOS3 and MULTICS were very reluctant to freeze the software design of those architecture elements. [Note that L178 Processes are called threads in recent Operating systems terminology.]

The concept of Process group and its identification as job steps' occurrences were introduced during that period.

A "Smart indexing", i.e., indexing modulo a length dependent upon the operand type was introduced.

Retrospectively, it appears that too much importance was given to the ease of implementation of some languages' features by compilers at the expense of CPU performances for high-end machines. It was assumed that all the machines would be micro-programmed (in PROM), a difference with the S/360 decor where the assumption was that the majority of instructions. should be wired-on in  the upper end processor.

A use of  ASCII code was planned at that time because IBM was then to have an ASCII mode on S/360 and because the overall culture of GE Computer Division was extremely reluctant to target any kind of IBM compatibility, such as the EBCDIC encoding , that was selected later.



Two Technologies were considered : a SUHL Sylvania technology as used in the GE600 and a CML (Current Mode Logic) technology developed in GE laboratories. Eventually, the CML was chosen as the base of the study, probably due to an intense lobbying of research people in front of John Haanstra, a  manager who remained technically minded.

Although the level of integration of CML was at that time extremely embryonic, that technology was chosen for its performances and its (relatively) low power consumption.

The main memory was assumed initially to be magnetic core in spite of its labor intensive cost figures ; at that time, GE was planning to set up a core weaving factory ...in the Navajo reservation! You should note that the intended manufacturing cost of a 32-bits CPU later was planned to be 8,900 1970-dollars, while memory's cost was expected to be 8,000 dollars per 32K Bytes!

The R370 CPU was to be developed in Paris - under the direction of Jacques BIENVENU ; it had to be based on hardware blocks, planned to be common to all the components of L-178, called SOMA (System Oriented Macro Assembly). Those SOMA were envisioned to be eventually LSIfied in a future version


I/O Subsystems

The peripheral controllers of the main line were to be developed on a common design of the Bull URC, while E120 peripherals had to be "integrated" and controlled by the CPU firmware..

The overall architecture of the PSI Channel --Peripheral Subsystem Interface,  was drafted at that time.

Because the 8-bit byte orientation of the L-178, the PSI had to be a parallel 8-bit channel. For data integrity reasons, due to the relatively low reliability of the subsystems of that time, it was excluded that PCPs had a direct access (DMA) to the main memory and decided that those accesses had to be controlled by the CPU itself.

A separate IOC (input-output controller), regrouping the channels' access to the system memory, was not envisioned at that time for cost reasons. It was also considered that the PSI should be the "long" cables in the system because the interface between the PCP and the devices might have to be specific and ought to control a "real-time" interface. This general design was later adopted for both the new product line and the GE-600+ line. In the latter, PSI channels -- although never actually identical to the NPL ones, supersede progressively the old (1965) Common Peripheral Interface (CPI) 6-bits wide channels.

It may be interesting to note that the main Discs that were contemplated at that time were removable discs with a 17MBytes(!) capacity and a transfer rate of 468KB/s. Future (1975) discs with up to 300MBytes were envisioned.

The L-178 systems remained punched card oriented.  GE was assuming a development of optical- reading of documents that was never materialized. Impact printers had, at that time, already reached their maturity (at 1300lpm).


The expected reliability was poor in face of present standards, no more than a MTBF of 100 hours. That was due to the low level of integration of the technology and consequently to the amount of connectors and cards existing in the system. It was expected to spend a large amount of hardware to check the system data integrity and to insert control probes.


End of L-178

At the end of 1968, the results were not satisfactory in the technology and hardware design areas: the building blocks (SOMA) were too numerous and the CML was not ready to be used by the 1970 time frame.

John HAANSTRA was asked to take direct responsibility of Phoenix engineering to reorganize the GE655 --alias GE6000, project and Gene WHITE left the company.

Bull reconsidered the R530 project in a more conventional TTL technology as a System730 and the Italian acted similarly.

Phoenix MSD -Medium Systems Department- was disbanded and merged with LISD (the GE600 engineering group).



GE then hired a new manager with a more business background, Richard ("Dick") BLOCH from Honeywell. Dick was instructed to take a more business orientation for the new Product line and to prepare a grandiose plan on which GE could take a decision to "lose or win" the computer business. This plan was to be designed by the Shangri-La project.

It should be reminded that this period saw the first abandon of a computer manufacturer company: RCA retreated and sold its business to UNIVAC.


64-DPS7 Product Line


Revision : 20 février 2003.