Gamma 60, an introduction

written by Jean Bellec

from articles by MM Davous, Bataille and Harrand and from FEB articles André Maître and Claude Massuard and also from a short interview of Philippe Dreyfus (may 1999).
see also the articles by M Smothermann.


Compagnie des Machines Bull, was in the late 1950s, "the" alternative and a very aggressive competitor for IBM punched card installations in Europe. It had introduced electronics in its calculators (Gamma 3) associated to the electromechanical tabulators and had introduced a magnetic drum   computer in the general purpose market (Gamma AET).

Bull did not want its large customers (banks, insurance, administrations) using large scale new computers appearing in United States (IBM 704, 705 and 709) and initiated the design of a genuine large scale processor. This program was undertaken from Bull's own resources (CMB shares in Paris Bourse reached summits in the late 1950s) and the program did not benefit from military or any other government subsidies. The Bull customers were not able (even if asked) to draw specifications from their needs and were waiting for a direction from the manufacturer. Remember that in the 1950s, the manufacturers usually did the programming of customer applications.

The directing specification was to match the capabilities of the large IBM business computers (709) that adopted the magnetic tape as a support for large files. It was also felt that some autonomous operation shoud be given to each peripheral unit instead of relying exclusively on a central computer to control the whole system. Apart that, it seems that  "carte blanche" was given to the architects of Bull's Engineering to design what a large scale general purpose computer had to be. Given the importance of business application processing in Bull, much attention was given to the performances of the peripheral operations. There was no specific incentive to provide  real-time functions and the system was to be used in batch (with daily or monthly production jobs).

Bull had a lot of experience in electro-mechanical technologies, and some experience in electronics valve technology, but it had no experience in transistors. The French electronics industry (CSF, Thomson, Radiotechnique) was essentially ignoring the computer market and were focusing into automation and military applications. So, the Gamma 60 did not benefit of the same conditions as the US or even the British industry at that time.
Bull had had access to the recently published ENIAC report, but the travels of its engineers were very scarce and the licensing agreements of Compagnie des Machines Bull and Remington Rand excluded the Univac division. So the Gamma 60 was designed from scratch from 1957.
That included a specific naming (exclusively in French) of computer objects that would be soon forgotten even inside Bull.

The Gamma 60's official announcement was made in 1960, but It has been disclosed to large customers well before that date.



Data types supported by the architecture are the following:


Instructions are one 24-bits word long.

Main memory addresses were coded on 15-bits in binary. Instruction addresses may be also relative or indirect. The address space was unique and continuous.

Operations are either load-store operations that reference main memory or processing instructions strictly operating on processing units registers. The instructions of the Gamma 60 may be seen as belonging to the class of RISC architecture. The format of instructions depends on the processing unit. For instance, arithmetic operations performed by the "arithmetic calculator" use 3 registers.

A special instruction (called "coupure") activate a processing unit by specifying a program address for it (actually, the coupure instructions had to be  stored just in front of that address). Another operation "SIMU" allows to specify an asynchronous branch for another unit.

The Gamma 60 should not be considered as a symmetric multi-processor although several separate processing units share the same address space and work in parallel, because  Gamma 60 was never implemented with several copies of the same type of processing unit. Actually, the processing units are specialized processors that the programmer may schedule to run in parallel on a single program or on a set of independent programs. The specialization of the processing units is what deny to the Gamma 60 the SMP  characteristic.

The independent processing units are

Each processing unit contains the following standard registers:

Each unit includes one or several RAQ registers (memorizing the data transfer initial addresses). Those registers can be loaded by "address instructions"

Data are transmitted to the processing units through two independent bus (one for input in memory TCC and one for output TCD). The arbitration of the data buses is performed by the Data Distributor (Distributeur de Quantités, in Gamma 60 jargon). Programs for each processing units were fetched from a "Program Distributor" a hardware unit that was the hub of the systems. The program distributor access the main memory through the same data bus as other units

The Gamma 60 architecture might be considered as a first design of an internally parallel architecture with a binary code specifying explicitly the parallelism of the execution, giving to the programming system the responsibility of achieving the best usage of the hardware (a concept recently resurfacing).
The specialized units were specified taking in account the amount of hardware needed to perfrom those functions and the relative performances of the processor and memory. No analysis of the frequency of instructions was available at the time of the design.


gamma60.gif (588813 octets)
SNCF Gamma 60

Hardware features of the Processing Units

Logical Calculator
Its organization is bit-serial.

General Comparator
The data handled by the Comparator are variable length from 1 to 255 binary words. It compare two strings or a string with a constant. It is also used to transfer data between two memory areas or to erase the contents of a memeory area.

It interprets a sequence of commands (called clichés) fetched as data from main memory. The translator is relatively complex; it includes several parallel elements that may access independently the main memory. It includes two separate local core memories.

Arithmetic Calculator
The additions are made in parallel on the different digits. Multiply is using   an operator performing systematic multiplications par 2 and 5 of the multiplier operand limiting the multiplication time to 3 times the addition time. The division reuse the same circuits as the multiplier.

Central Clock Generator
The Clock Generator send to the main memory 5 clock signals at 200 KHz and generates a set of clock signals at 100 KHz that is the frequency of operation of the system.


Magnetic Tapes
Tapes were from Electrodata (to be Burroughs) origin, associated with a Bull electronics.
Tapes had 8 tracks and store the data in variable blocks (block length between 16 and 4095 words contains its length). A tape -with long blocks- may contain 7Mc to 11Mc, according the tape length.

Unit record devices
Unit record devices (card readers, card punches, line printers) are connected through  a controller called Multiplexer that buffers the slow devices from the data channels. The line printers include a magnetic core buffer of one line for controlling printed data integrity.

Program integrity

There is no memory protection between the different programs coexisting in main memory. So debugging should be made in specialized uniprogramming sessions.

Data integrity

The Gamma 60 was built with a brand new technology. It was targeted towards business operations such as accounting, payroll with long duration jobs. Data integrity was a primary customer requirement.

Card readers had three successive read stations, allowing to verify the data. Card punches included a read station after the punch station. Printers hammer movement was detected and compared to the data expected to print. Tape drives had a reader station after writing. The selected main memory addresses were compared to the requested addresses.

Any transfer of data controls also a Key: character parity bit for tapes, one parity bit for each half-word plus a parity bit for the whole word. keys were also provided for arithmetic data. Mod 3 key was used for addresses. Mod 7 Key was used for BCD numbers.



Gamma 60 was the first Bull computer with a (almost) entirely solid-state logic. Germanium transistors (NPN and PNP) are used for amplifiers and clock generator, germanium diodes for logic gates. Ge technology was quite sensible to temperature, and causes severe constraints for temperature regulation and design constraints.


Gamma 60 was the first Bull computer to use magnetic cores technology.

The central memory was built from 2 to 8 three-dimensional blocks containing 64x64 words ("catène" was the French neologism for word) of 24+3 bits, i.e. 110592 cores per block. Four wires crossed each core: 2 selection wires, 1 reading wire, 1 writing wire.
The current generators of the main memory use electronic valves.
The output register Z contained 31-bits (the memory contents plus 4 control bits)

The cycle time of the main memory was 10µs (microseconds) with a tolerance of + or - 2 µs.

Bi-dimensional core memories were used for:

In those 2D- core memories, each core was crossed by 14 wires for technological reasons.

Magnetic Tapes

Gamma 60 was also the first Bull computer to use magnetic tapes.

The Mylar 1/2 inch tape was read at the nominal speed of 1.9 meter per second. The tape had 7+1 tracks. A word occupies a length of 0.34 millimeter and is read or written in 190µs. Each (varaiable length) block is 16 words minimum, 4095 words maximum and is delineated in front and in the back by a 3-words flag (sync data and length). A special mark blocks had a 16 words length. Two successive blocks were separated by a start-stop gap.

Tapes could be read in the both directions.


The Gamma 60 technology is packaged in printed-circuits small boards and in  a hierarchy of larger assemblies to eventually formed 1.80m high racks ("baies"). A system unit includes from 2 to 8 racks (i.e. from 2 to 9.20 meters width).

A whole system occupied an area of 200 to 400 square meters.


Each Gamma 60 required a dedicated room, generally specially built for the installation. A false floor stored the logic interconnecting cables and power cables -sometimes spare parts and field engineers' private things-. The room should be protected from external interferences by a Faraday cage mechanism. The low tolerance of germanium technology required air-conditioning, then infrequent in Europe, and the sensitivity of tapes to dust required pressurization of the computer room and of the tape storage room.



The major drawback of the Gamma 60 was that its designers did not realize the need for a standard operating system adapted to the sophistication of the system. Their idea was software has to be designed for the needs of each customer and Bull sent engineers with each system helping the customer to program his system. It took two to three years to each customer to get into production and some were not patient enough to wait.


Machine language was called code A.

The first language was a card oriented assembly language, named code B. Code B referenced decimal addresses and symbolic op-codes. Code B also had the concept of subroutines referenced through  symbolic names. Progressively, Bull developed an extensive library of 300 subroutines, specially dealing with arithmetic computation and I/Os.

Code C allowed the addition of pseudo-instructions improving the linkage of subroutines and allowing the design of programs overlays.

While FORTRAN was available on IBM machines of that class, Bull wanted to develop its own language AP3 . The narrow base of potential users lead to the early termination of that project. Gamma 60 was used for one of the first implementation of Algol 60.

Operating System

The initial operation of Gamma 60 was under the control of human operators, assisted by an embryonic operating system called GGZ ("Gestion générale Zéro").
GGZ was a tape monitor, with a small resident operating system, containing a resource table, a table of programs, the program loader and tape error handlers. GGZ also included a error recovery program (for unit record devices and tape volume handling) and a   interpreter of operator commands. GGZ loader was also able to initialize some variables at loading time, from cards (in code D2) or from operator inputs.

Another operating system, not completely implemented, was GGU . The resident part of GGZ was extended to 3800 words (adding in particular memory management). The peculiar need to recover errors in tape sorts was addressed. The concept of automatic job management was introduced (D3 cards) decreasing the operator involvement in production operation from data input to listings printing. GGU considered also job execution scheduling according peripheral availability and the specific requirements of a debugging mode.




People having worked on the Gamma 60 project (hardware engineers, engineers discovering the software in the early 1960s, people working at customers sites from Bull or customers staff), all have nostalgic memories of that 1956-1962 period.

In fact, the Gamma 60 had no predecessor. It will have neither any successor. Compagnie des Machines Bull had to entrench itself into its traditional medium-range market (within the RCA licenses) and later started a new life as a General Electric division. The Gamma 60 jargon and culture, for the best and for the worst, was forgotten.
Many Gamma 60 people leave Bull to become the nucleus of American companies entering the French market in the early 1960s. An anecdotic story is that the Mitsubishi's Gamma 60 staff ended eventually into NEC around 1985, and found there an opportunity to meet again Bull people whom  have been lost from view for some 20 years.

Gamma 60 contributors


Revision : 19 février 2002.