Iris 50/60
adapted by Jean Bellec from papers written for FEB by Marc Lévy
Introduction
The computer Iris 50 was produced by CII Compagnie Industrielle pour l'Informatique, as part of Plan Calcul. It was the first system developed under that plan and the only one that originated from scratch(1). Its original code name was P1.
Its target was the business applications market, the main asset of the French rival Bull-General Electric and the stronghold of IBM.
The P1 system was introduced by CII as Iris 50. A P2 system, compatible with P1, was introduced as Iris 60.
Architecture
Data are 8-bits characters.
Its instruction set used 32-bits fixed length instruction. The addressing was relative to mod-64KB segments (opposed to smaller mod-4K in S/360).
Memory addressing is limited to 256 KB on Iris 50 and 1024K on Iris 60..
Its discs were fixed length 256-bytes sectors
Models
Iris 45 was an entry model, a downgraded Iris 50. It was announced March 25th 1971.
Iris 50 was positioned faced to IBM 360/50. It was also produced under license in Romania as Felix C-256. Iris 50 was announced in France in September 1968 and the first shipment occurred February 13th, 1970.
Iris 60 was positioned face to IBM 370/145 and 155. It was announced in September 1971.
Iris 60 hardware included a relocation map of memory, known as topographic memory, but that feature -not available on Iris 50- was not supported by software.
Iris 55 was a downgraded version of Iris 60, announced January 15th, 1973
A military ruggedized version Iris 55M was produced by CII for the French Navy, for the strategic submarines SNLE. It was introduced September 30th, 1970.
Software
Siris 2
Siris 2 was designed as a rival of IBM DOS attempting to reedy some of weaknesses of DOS.
Siris 2 supported a maximum of 14 partitions (vs. 3 in the original DOS). One partition, the background partition supports batch job stream. Other were operator controlled and could be permanent ("real time")
The Linkage Editor transformed a segment name into the loading of a base register and a segment number, freeing the programmer of memory allocation constraints.
Siris 2 first version (v00) was commissioned by Plan Calcul at the end of 1969 and first shipped in February 1970. Siris 2 v1.2 shipped mid-December 1970 was the first release respecting the original specs. In the mid-time bug fixing was made on a custom basis for each Iris 50 user.
Siris 2 had built-in limits, noticeably 16-bits system tables that were a major drawback for the Iris 60.
Siris 3 original project
In 1971, CII started , for Iris 60, a design of a Siris 2
upward compatible operating system competitive with IBM OS/MFT. Siris 2 internals had to
be modified (32-bits tables).
Instead of a single background partitions, every "region" should support batch
jobs, so a new monitor had to be designed for job management, and a new dispatcher
allowing priority scheduling were needed.
Resident File management should be shared by the different programs.
Automatic data entry and data output spoolers ("symbionts" were planned.
Support of Iris 60 "topographic" remapping of memory would provide dynamic
memory allocation.
Cancellation of Siris 3 original project
The future of Iris 60 was torpedoed by the Unidata agreement negotiated in 1972 between CII, Siemens and Philips that establish plans for a Unidata common product line, the Series X, where the Siemens BS-2000 operating system was to be the medium-range operating system.
Instead of pursuing the ambitious original plan for Siris 3, CII decided to rename an evolutive version of Siris 2 as Siris 3, the name and some characteristics of which having been disclosed to influent customers.
The new Siris 3 was focused on Iris 50 as well as Iris 60, forgetting features not compatible with Iris 50 (such as "topographic memory"). Symbionts originally designed for Siris 2 were improved to support externally visible functions of Siris 3. A new job scheduler , the memory and job managements were redesigned and reimplemented.
However, system tables remained on 16-bits. File management remained linked to each program. Multitasking and dynamic memory management were forgotten.
Siris 3 operation
The first Siris 3 w10 (functionally similar to Siris 2 v14) was shipped in April 1973. Siris 3 w11 and Siris 2 v14.2 were shipped one year later.
At the end of 1974, both operating systems were given the same w15 index. That version introduced the support of 100MB MD100 disc drives.
Siris 2 was officially discontinued in v16, in February 1977, a system generation option allowed to operate smaller configurations under Siris 3. Siris 3 v16 brought the support of shared discs between two systems, the volume automatic recognition, the support of MD200 200MB discs and the support of PENA-30 3200bpi tapes.
CII had already taken over by Honeywell-Bull and merged into CII-HB. The Unidata alliance was discontinued and it was planned to migrate Iris 50/60 product line to the Honeywell French designed GCOS64 product line (that plan was disclosed as earlier as March 1976)
The upper model of the DPS-7 product line (the DPS-7/80) was to include an Siris 3 emulator that allowed users to operate in a fully compatible mode.
DPS-7 emulator
The Siris 3 emulator on DPS7-80, included :
The system did not require new hardware, nor the reconnection
of Iris peripherals.
The emulator project was accomplished by Siris 3 knowledgeable engineers and went on
smoothly. The performances of the emulator under GCOS were better than those of Iris 60,
thanks to the new peripherals and the I/O buffering in main memory. However, the majority
of Siris 3 users converted their operation to GCOS7 and the emulator was more a
reinsurance for them of the possibility of falling back to their old system than an
operational production operating system.
(1) the other genuine computers of CII are the Mitra 15 developed outside the Plan Calcul and the Unidata 7740 developed within Unidata program.
People
The project leader responsibility was assigned to Gérard Cottet.
Revision : 13 juin 2002.